Plan to add 3,000 engineers by 2028, investment not tied to govt incentives: AMD CTO

US chipmaker Advanced Micro Devices’ (AMD) decision to invest $400 million in India isn’t tied to government incentives but rather a vote of confidence in the country’s strong talent pool, said Mark Papermaster, chief technology officer at AMD.

In an interview, Papermaster said that most of the investment will go towards setting up the R&D centre in Bengaluru, which will be the largest for AMD worldwide, and hiring 3,000 engineers by 2028. He said that steps taken by the government to develop semiconductor skills and other initiatives will make India a global talent hub.

Will AMD seek government incentives under the Semicon scheme for the $400 million investment and if so, how much?

The announcements from AMD are not tied to government incentives.

Is it a cost benefit to have larger ER&D (engineering, research and development) operations in India for a chipmaker?

AMD has a 20-plus-year R&D presence in India and the team here is a key contributor across our broad product portfolio. We benefit from the deep talent in India.

AMD India already has chip engineers and designers. How will the new additions impact the company?

We plan to grow our full-time employees from 6,500 plus today to up to 9,500 plus by end-2028. The additional engineers will enable AMD to stay ahead and design products combining leadership performance and energy efficiency while adding AI acceleration across our product portfolio.

What technical elements will the investment entail?

The investment covers a new office in Bangalore. This will be our largest design centre in the world, and it will open later this year. The campus is 500,000 square feet and has hybrid workspaces and the latest collaborative tools designed to foster teamwork and innovation. A substantial part of the investment will also go towards adding 3,000 engineers to our India workforce by 2028.

What benefits can AMD expect from India’s chip PLI/DLI policies?

These policies do not directly apply to AMD. We understand the government is evaluating a proposal to expand DLI to multinational companies designing in India. Currently, it’s extended to domestic companies, startups and MSMEs. Similarly, the PLI programme is geared toward IT hardware manufacturing.

We are committed to supporting our partners who intend to leverage these incentive programmes to drive growth in India, from India.

Where does India’s supply chain for chip designers/engineers stand presently, in comparison with other major global markets?

India has huge potential to meet the talent demand of the semiconductor industry. More than half a million engineers graduate each year, so there is the availability of raw talent. The gap is not in the headcount but in the skillset. Currently, skill development happens after engineers graduate and join companies. Companies upskill them with real-world training.

To address this gap, the government of India set up a talent committee that was spearheaded by AMD Country Head, Jaya Jagadish. The committee proposed curriculum changes and AICTE is already making them in 300-plus engineering colleges that offer a major in VLSI design. This is the long-term approach.

To address the near-term upskilling needs, the government of India has partnered with international universities like Purdue to design industry-relevant course work that can be taught to students currently pursuing their engineering degree in VLSI and relevant fields.
These measures along with other initiatives will not only make India self-reliant in semiconductor talent but also enable the country to meet the talent needs of the industry, globally.

AMD intends to use AI for chip design. Which elements can be expected from the India centre in the short and medium term?

AMD design teams are already deploying AI acceleration in our design implementations across physical design and verification flows.

Does AMD invest in high-fidelity digital twins in its chip design/simulation facilities?

Yes. AMD emulation systems are essentially digital twins of our chip designs/products that allow us to ensure software works before the manufacturing of chips actually begins. Further, our adaptive computing chips are used as part of digital twin solutions for other industries.